1. Field of the Invention
The present invention relates generally to sense amplifiers, and more particularly, to methods and systems for optimizing sense amplifier performance for the sense amplifier manufacturing process.
2. Description of the Related Art
The manufacturing processes for manufacturing semiconductor devices include multiple steps, multiple sub-processes and countless opportunities for unintended variation. The semiconductor manufacturing processes are constantly refined to produce semiconductors having a desired performance level such as a device switching speed. The semiconductor manufacturing processes are also very strictly controlled to yield repeatable results. However, manufacturing process variations still do occur. Therefore, the performance levels of the resulting semiconductor devices can vary somewhat. These performance variations are typically measured in production testing.
By way of example, a refined and controlled semiconductor manufacturing process produces sense amplifiers having a range of switching speeds. FIG. 1A is a graph 100 of a distribution of switching speeds of sense amplifiers produced by a selected semiconductor manufacturing process. A first portion 102 of the sense amplifiers has a switching time within a desired target range such as between 1.00 nanoseconds (ns) and 0.95 ns. As a result, all of the sense amplifiers in the first portion 102 can be operated in a 1-gigahertz (gHz) circuit because a 1 GHz circuit requires the sense amplifier to have a switching speed of 1.00 ns or less. The first portion 102 of sense amplifiers are referred to as being “typical-type” sense amplifiers because the first portion 102 of sense amplifiers operates within the desired target range (e.g., at least 1 gHz) of switching speed.
A second portion 104 of the sense amplifiers has a faster switching time of less than 0.95 ns (e.g., between 0.90 ns to 0.95 ns). As a result, all of the sense amplifiers in the second portion 104 can also be operated in a 1 GHz circuit. The second portion 104 of sense amplifiers are referred to as being “fast-type” sense amplifiers because the second portion 104 of sense amplifiers can operate faster than the desired target range (e.g., at least 1 gHz).
However, a third portion 106 of the sense amplifiers has a switching speed of more than 1.00 ns (e.g. between 1.00 ns and 1.05 ns). Therefore the all of the sense amplifiers in the third portion 106 cannot be operated in a 1 GHz circuit. If the desired performance of the third portion 106 of the sense amplifiers were to switch at a frequency of 1 GHz for use in a 1 GHz circuit, then the third portion 106 of the sense amplifiers would be unsuitable for the desired use. The third portion 106 of sense amplifiers are referred to as being “slow-type” sense amplifiers because the third portion 106 of sense amplifiers cannot operate at the desired target range (e.g., at least 1 gHz).
As described in FIG. 1A above, the semiconductor manufacturing process produces semiconductors operating across a performance range due to variations in the semiconductor manufacturing processes. The performance range can occur between sense amplifiers that are formed on different semiconductor wafers or sense amplifiers that are formed on different parts of a single wafer or even sense amplifiers contained in different parts of a single integrated circuit. By way of example, in a single manufacturing process, a first sense amplifier formed on a first semiconductor wafer may be about 20 percent faster than a second sense amplifier formed on a second semiconductor wafer. Similarly, a first sense amplifier formed on a first portion of a semiconductor wafer may be about 5 percent faster than a second sense amplifier formed on a second portion of the same semiconductor wafer. Typically sense amplifiers and other semiconductor components are tested during the production process to determine if the component has a fast, slow or typical operating (e.g., switching) speed.
Unfortunately, the slow-type sense amplifiers 106 are often intermixed with the typical-type sense amplifiers 102 and the fast-type sense amplifiers 104. For example, FIG. 1B shows a microprocessor 120 with four signal paths 122, 124, 126 and 128 between respective regions A and B, A and C, A and D, and A and D. FIG. 1C is a schematic of the signal path 124. The signal path 124 includes a flip-flop 142 coupled through multiple logic stages 144, 146, 148 to a sense amplifier 150. If the sense amplifier 150 is a slow-type sense amplifier, then the signal path 124 will be a slow-type signal path. Further, if signal path 122 is a fast-type signal path (e.g., includes fast-type components) and signal paths 126 and 128 are typical-type signal paths (e.g., include typical-type components) then the timing of the entire integrated circuit 120 is limited to no faster than the slow-type signal path 124. Therefore the entire integrated circuit 120 is a slow-type integrated circuit.
FIG. 2 is a schematic of a well-known sense amplifier 150. The sense amplifier 200 is a well-known differential-type amplifier that is capable of resolving small voltage differences and producing a large output voltage. The sense amplifier 150 includes four transistors 202, 204, 206, 208.
The performance of the sense amplifier 150 is controlled by several amplification control parameters such as bias voltage and bias current. Transistor 212 provides a constant current source that is controlled by a bias voltage applied to the gate of transistor 212. As shown transistor 212 is an n-type device so therefore the bias voltage is an N-bias. The bias voltage is typically supplied by a bias voltage source that is local to the particular sense amplifier 150 or a set of sense amplifiers. The bias voltage is a nominal constant voltage from the bias voltage source. The actual bias voltage required is dependant on the particular device. In one semiconductor device, the bias voltage is typically 0.5VDC. The bias voltage biases transistor 212 at saturation so as to conduct a constant current IBIAS.
Constant current IBIAS is equal to the sum of I1 and I2 flowing across transistors 204 and 208, respectively. While the sum of I1 and I2 is constant, current I1 is greater than I2 if the voltage is applied to the gate of transistor 204 is greater than the voltage applied to the gate of transistor 208. Conversely, current I2 is greater than I1 if the voltage is applied to the gate of transistor 208 is greater than the voltage applied to the gate of transistor 204. An output signal is taken from output terminal 210.
The gain (Av) of the sense amplifier 150 is equal to the product of resistance (RL) of the load transistors 202, 206 and the trans-conductance (gm) of the input transistors 204, 208. The slew rate (i.e., switching time) of the sense amplifier 150 is dependant on the ratio of the IBIAS and the output capacitance (Co). Therefore, a changing in the bias current IBIAS can change the slew rate (i.e., increase or decrease the switching time) and the gain (Av) of the sense amplifier 150. Similarly, a change in the bias voltage can change the bias current IBIAS.
In the past, increasing a power supply voltage (VDD) could accelerate a slow-type integrated circuit such as integrated circuit 120, by increasing the bias voltage to the slow-type sense amplifier 150. Increasing the VDD can similarly also cause all of the components in the slow-type integrated circuit 120 to switch faster.
The power P that must be dissipated by the integrated circuit 120 can be determined as shown in the following Formula 1:P=C*(VDD)2*F  Formula 1
Where C is the capacitance of the integrated circuit 120 and F is the frequency of operation. Therefore as VDD is increased then the power dissipation is also increased at an exponential rate.
In many prior art integrated circuits an increased power dissipation was easily managed with improved cooling (e.g., larger heat sinks, cooling fans, etc.). Unfortunately, many current integrated circuits include device densities and devices having physical sizes that cannot tolerate increased power dissipation throughout the integrated circuit. As a result, increasing the VDD will reduce the reliability of the integrated circuit. Simply increasing the VDD to the entire integrated circuit is therefore not an acceptable option.
In view of the foregoing, there is a need for a system and method for increasing the operational speed of the slow-type components such as slow-type sense amplifiers in an integrated circuit without significantly increasing the amount of power that must be dissipated by the integrated circuit and thereby not reducing the reliability of the integrated circuit.